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New IEEE study explores AI acceleration with photonics

The research, led by Dr. Bassem Tossoun, Senior Research Scientist at Hewlett Packard Labs, introduces a photonic integrated circuit (PIC) platform that could reshape how AI workloads are processed.

byKerem Gülen
April 11, 2025
in Industry
Home Industry

As the demand for artificial intelligence (AI) accelerates across industries, a new study published by the IEEE Photonics Society highlights a promising hardware breakthrough designed to address AI’s growing energy and performance challenges.

The research, led by Dr. Bassem Tossoun, Senior Research Scientist at Hewlett Packard Labs, introduces a photonic integrated circuit (PIC) platform that could reshape how AI workloads are processed. Unlike traditional GPU-based systems that rely on electronic distributed neural networks (DNNs), this new platform leverages optical neural networks (ONNs), operating at the speed of light with significantly reduced energy consumption.

Published in the IEEE Journal of Selected Topics in Quantum Electronics, the study presents photonic acceleration as a scalable and sustainable alternative for next-generation AI hardware. The approach focuses on integrating photonic devices directly onto silicon chips using a mix of silicon photonics and III-V compound semiconductors.

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Silicon photonics technology has long been considered promising for data-heavy applications. However, scalability for complex AI operations remained a hurdle. The IEEE research team addressed this by combining silicon photonics with III-V materials such as indium phosphide (InP) and gallium arsenide (GaAs), enabling on-chip lasers, amplifiers, and high-speed optical components to function together efficiently.

“Our device platform can be used as the building blocks for photonic accelerators with far greater energy efficiency and scalability than the current state-of-the-art,” said Dr. Tossoun.

The fabrication process began with silicon-on-insulator (SOI) wafers and incorporated a series of advanced steps, including lithography, doping, selective silicon and germanium growth, and die-to-wafer bonding for III-V materials. The result is a wafer-scale integration of critical components like on-chip lasers, amplifiers, modulators, photodetectors, and non-volatile phase shifters—all essential for building optical neural networks.

This level of integration allows the platform to execute AI and machine learning workloads with higher efficiency while minimizing energy losses commonly seen in electronic-based systems.


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The new photonic platform is designed to support the growing infrastructure needs of datacenters running AI workloads. With its ability to handle intensive computational tasks more efficiently, the platform could help organizations optimize power usage while scaling AI operations.

Looking ahead, the researchers see this innovation contributing to more sustainable AI development, helping overcome the rising energy demands of deep learning and large-scale data processing.

The research is detailed in the paper titled “Large-Scale Integrated Photonic Device Platform for Energy-Efficient AI/ML Accelerators,” published in the IEEE Journal of Selected Topics in Quantum Electronics. The project reflects ongoing efforts within the photonics community to develop hardware solutions that align with the future performance and sustainability needs of AI infrastructure.


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Tags: AIIEEE

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